The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed.
For example, lithography processes often implement exposing and developing processes to pattern small features during IC wafer fabrication and mask fabrication. One of the challenges that arises during the lithography processes is that a bottom scum (footing) is attached to a resist profile. The footing of the resist profile may interfere with an ion implantation process or an etching process, and may further impact the performance of the IC devices.